I think it depends on how you have specified your design in the first place. The XILINX ISE tool will let you build a system in RTL (so draw the gates) You can then write a test program in vhdl or Verilog to specify the inputs and clock pulses... If you want a free tool I did see this mentioned on a Facebook group but I have not tried it ... http://www.cburch.com/logisim/index.html Dave G4UGM
-----Original Message----- From: vcf-midatlantic [mailto:vcf-midatlantic- bounces@lists.vintagecomputerfederation.org] On Behalf Of Alan Hightower via vcf-midatlantic Sent: 30 December 2016 06:30 To: vcf-midatlantic <vcf-midatlantic@lists.vintagecomputerfederation.org> Cc: Alan Hightower <alan@alanlee.org> Subject: Re: [vcf-midatlantic] Logic simulator
If you want enough rope to hang yourself and need the ability to run logic simulations programatically, use verilator to convert Verilog into a C class that can be controlled from a program. I use it to perform functional simulations of my FPGA designs before working with timing based simulation tools or the real silicon.
-Alan
On 2016-12-29 22:45, Mike Loewen via vcf-midatlantic wrote:
What's a nice (and free) TTL logic simulator for Linux? Something you can both clock and single-step, and has the basic building block (flip-flops, gates) some higher level components like encoders/decoders.
Mike Loewen mloewen@cpumagic.scol.pa.us Old Technology http://q7.neurotica.com/Oldtech/ [1]
Links: ------ [1] http://q7.neurotica.com/Oldtech/